Advances in semiconductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit devices. As a result, computer system configurations have evolved from a single or multiple integrated circuits in a system to multiple hardware threads, multiple cores, multiple devices, and/or complete systems on individual integrated circuits. Additionally, as the density of integrated circuits has grown, the power requirements for computing systems (from embedded systems to servers) have also escalated. Furthermore, software inefficiencies, and its requirements of hardware, have also caused an increase in computing device energy consumption. In fact, some studies indicate that computing devices consume a sizeable percentage of the entire electricity supply for a country, such as the United States of America. As a result, there is a vital need for energy efficiency and conservation associated with integrated circuits. These needs will increase as servers, desktop computers, notebooks, Ultrabooks™, tablets, mobile phones, processors, embedded systems, etc. become even more prevalent (from inclusion in the typical computer, automobiles, and televisions to biotechnology).
A cache memory as may be used in a processor or otherwise within a system achieves leakage power reduction by putting un-accessed portions of the cache memory in a low power or sleep state by reducing a local voltage in a retention mode. This is accomplished by a series of switches inserted between the portion of the cache memory itself and a power supply. The number of switches that are turned on is modulated to achieve the desired voltage droop. The sleep setting of these switches is a function of the process, temperature and operating voltage. At high operating voltages, the sleep voltage droop may be higher than at lower operating voltages, while at even lower operating voltages (close to a retention voltage) the sleep function is disabled altogether, as the local voltage supply cannot drop below the retention voltage value.